********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*Mar 24, 2014
*ECN S14-0598, Rev. A
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT Si8425DB D G S 
M1 3 GX S S PMOS W= 3210000u L= 0.25u 
M2 S GX S D NMOS W= 3210000u L= 0.32u
R1 D 3 1.36e-02 2.38e-03 -1.337e-06 
CGS GX S 1.163e-09 
CGD GX D 6.823e-11 
RG G GY 15
RTCV 100 S 1e6 2.168e-04 -1.471e-06 
ETCV GY GX 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD D S DBD 3210000u 
**************************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 2e-8 
+ RS = 0 KP = 6.230e-06 NSUB = 1.4e+15 
+ KAPPA = 1.229e-06 NFS = 1.000e+12 
+ LD = 0 IS = 0 TPG = -1 CAPOP = 12 ) 
*************************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 2e-8 
+NSUB = 8.226e+16 IS = 0 TPG = -1 CAPOP = 12 ) 
**************************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 2.000e-08 TREF = 25 BV = 21 
+RS = 6.034e-02 N = 1.732e+00 IS = 7.698e-07 
+EG = 9.262e-01 XTI = -2.730e+00 TRS = 1.363e-04 
+CJO = 7.737e-11 VJ = 3.000e-01 M = 3.831e-01 ) 
.ENDS 
